Agp Fastwrite help!

Hey guys,

I was looking through my bios when I found Agp fast write,Agp 3.0 calibration cycle and DBI for agp trans all 3 diasbled.Im not sure what they are.Should I enable them or enable a few or keep em all disabled?

specs are

Amd Fx53
Bfg 6800Gt 256mb
2 gigs of ram

 

Fast writes can increase performance but at the cost of stability on my msi neo3 it just locks up the comp,the other two create stability with no negative effects to performance

Try them,run 3dmark 2003 -2005 after each has been changed see if you notice any performance gain or if it clears up any stability problems your having

 

AGP Fast Write

Common Options : Enabled, Disabled

Quick Review

This BIOS feature controls the AGP bus' Fast Write capability. Fast Write is a feature which accelerates memory write transactions from the chipset to the AGP device.

Fast Write allows the AGP device act like a PCI device. This allows it to bypass the main memory and directly access the data which improves AGP read performance. However AGP write performance is not affected.

While this feature may appear to greatly improve the performance of AGP graphics cards, its actual performance effect is quite negligible. Also, it reduces the overclockability of the graphics card when enabled.

Therefore, if you do not intend to overclock your graphics card, it is recommended that you enable AGP Fast Write for potentially better AGP read performance. However, you should definitely disable it if you intend to overclock your graphics card, or if any of your PCI cards start acting funny.
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AGP 3.0 Calibration Cycle

Common Options : Enabled, Disabled

Quick Review

This BIOS feature controls the AGP 3.0 calibration cycle feature of the motherboard chipset. It is only found in motherboards that support the AGP 3.0 standard.

When enabled, the motherboard chipset will periodically initiate a dynamic calibration cycle on the AGP 3.0 bus. This allows the AGP 3.0 bus to maintain its timings and signal integrity.

When disabled, the motherboard chipset will not initiate any dynamic calibration cycle on the AGP 3.0 bus. The AGP 3.0 bus timings and signal integrity may suffer from changes in voltage and temperature during operation.

As the dynamic calibration cycle maintains the AGP 3.0 bus' timings and signal integrity, it is highly recommended that you leave it at the default setting of Enabled.

However, please note that this feature is only implemented if both motherboard chipset and AGP graphics card are operating in the AGP 3.0 mode. It is automatically disabled when the AGP 2.0 mode is used.

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DBI Output for AGP Trans.

Common Options : Enabled, Disabled

Quick Review

The full name for this BIOS feature is Dynamic Bus Inversion Output for AGP Transmitter. It is an AGP 3.0-specific BIOS feature which will only appear when you install an AGP 3.0-compliant graphics card.

When enabled, the AGP controller is allowed to use the Dynamic Bus Inversion scheme to reduce power consumption and signal noise.

When disabled, the AGP controller will not use the Dynamic Bus Inversion scheme to reduce power consumption and signal noise.

The AGP bus has 32 data lines divided into two sets. Sometimes, a large number of these data lines may switch together to the same polarity (either 1 or 0) and then switch back to the opposite polarity. This mass switching to the same polarity is called simultaneous switching outputs and it creates a lot of unwanted electrical noise at the AGP controller and GPU interfaces.

To avoid this, the AGP 3.0 specifications introduced a scheme called Dynamic Bus Inversion or DBI. It makes use of two new DBI lines - one for each 16-line set. These DBI lines are only supported by AGP 3.0-compliant graphics cards.

Dynamic Bus Inversion ensures that the data lines are limited to a maximum of 8 simultaneous switchings or transitions per 16-line set. It does so by switching the DBI line instead of the data lines when the number of simultaneous transitions exceeds 8 or 50% of the data lines. This ensures that electrical noise due to simultaneous switching outputs are minimized.

In short, DBI improves stability of the AGP interface by reducing signal noises that occur as a result of simultaneous switching outputs. It also reduces the AGP controller's power consumption.

Therefore, it is recommended that you enable DBI Output for AGP Trans. to save power as well as reduce signal noise from simultaneous switching outputs.
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The above is from
Adrians Rojak Pot "The Definifitive Bios optimization Guide":
http://www.rojakpot.com/freebog.aspx

Lot's more good Stuff in there